Ask what the fill must support
A microvia beneath a solder land and a microvia beneath another microvia have different immediate responsibilities. One must provide an appropriate assembly surface; the other participates in another interconnect interface. A design may require both conditions at different locations.
Classify the intended uses in the drawing rather than applying a vague fill instruction to every via. Clarify whether any structures are intentionally left open and whether the outer surface will receive further planarization or other processing.
Separate fill quality from interface quality
Atotech's plating material describes blind-microvia filling as a controlled deposition application. Geometry, chemistry, and process conditions interact; a nominally filled opening is not merely an ordinary plated hole with extra copper added.
Review the target interface, internal fill condition, and surface topography as distinct characteristics. Define acceptance using the agreed product requirements and appropriate inspection method. Do not invent a universal acceptable void size or dimple depth based on a different supplier's demonstration.
Check the neighboring geometry
An illustrative layout revision moves microvias directly beneath package lands to free routing channels. That change should trigger a review of the final land surface and assembly process, even if the via's layer span remains unchanged. If a second microvia is later stacked there, review the additional interface too.
- Identify the complete via structure beneath each critical land.
- Check finished copper assumptions used by fine-line routing.
- Reserve registration margin around the target connection.
- Use inspection locations that represent the actual structure.
Request evidence matched to the use
A section image can show a sampled structure, while a performance test can expose behavior under selected stress. Use them to answer complementary questions. Record the material, via dimensions, stack configuration, and exposure associated with the evidence so it remains meaningful when comparing a new proposal.
Adjacent-layer access, one connection at a time
Dielectric · geometry + material
Core or build-up dielectric
Illustrative only. Copper thickness, dielectric construction and via spans require a reviewed stackup.
Common questions
Are copper-filled and resin-filled vias equivalent?
No. They describe different structures and processing choices. Specify the intended fill and surface requirements instead of using the terms interchangeably.
Does copper filling guarantee stacked-via reliability?
No. Reliability depends on the complete interconnect and its process history. Evaluate representative evidence against the assembly and service conditions.
References & further reading
Method & assumptions · General design guidance. Validate the proposed construction and acceptance criteria for your project.