Define the path that the receiver cares about
A signal may pass through series resistors or coupling components that divide it into several CAD nets. Altium's xSignal workflow supports defining a path across such connectivity for relevant constraints. In any tool, verify that the reported path begins and ends at the intended pins or reference points. A perfectly matched set of partial net lengths can still leave the full receiver paths unmatched if one segment was excluded from the rules.
Separate different timing relationships
Create distinct constraints for members of a differential pair, signals within a data group, and any required lane-to-lane relationship. Use the current device guidance to determine whether signals should match each other or a strobe, clock, or other reference. Include package-delay information when the applicable methodology requires it. Do not lengthen every route to the longest net simply because a global match rule is easy to configure. Unnecessary length spends loss and routing area without adding timing value.
Account for the layer distribution
A route that spends most of its length on a surface layer may not have the same delay as an equal-length embedded route. Use the approved stackup to calculate segment delays and include via-related contributions as appropriate. A simple planning expression is total delay equals the sum of each segment's length multiplied by its delay per unit length, plus modeled transition and package contributions. Keep the approximation's limits visible when evaluating tight timing margins.
Tune deliberately and verify again
Place tuning where it fits without creating excessive coupling to itself or neighboring nets. Prefer a clean route architecture that starts near the required delay over a large dense meander added at the end. After tuning, rerun spacing and reference checks, then review whether the tool counts arcs, pads, and vias as intended. Keep the final timing report with the exact stackup revision. A later layer reassignment can invalidate a previously acceptable match without changing the endpoint connectivity.
A continuous reference keeps the return path close
Dielectric · geometry + material
Core or build-up dielectric
Illustrative only. Copper thickness, dielectric construction and via spans require a reviewed stackup.
Common questions
Should every high-speed trace have the same length?
No. Matching requirements depend on the interface and timing relationship. Many independent channels have no useful reason to match each other's lengths.
Can extra length always compensate for a pair asymmetry?
It can adjust delay, but it does not automatically remove impedance discontinuities, unequal coupling, or mode conversion at the original asymmetry.
References & further reading
Method & assumptions · General design guidance. Validate the proposed construction and acceptance criteria for your project.