Begin with the actual interface rules
Identify the required differential impedance, allowable skew, route loss, and topology from the device and interface documentation. Do not copy a familiar pair rule from another protocol. Intel's high-speed layout guidance treats transmission-line behavior, coupling, and termination as related design issues. For the layout team, turn the chosen requirements into layer-specific width and gap rules plus a defined path boundary, such as package pin to connector reference plane.
Preserve symmetry at the difficult locations
Review package breakouts, coupling capacitors, layer changes, and connector launches before polishing long straight routes. One member may encounter a different pad, via count, or nearby plane void even when the overall lengths match. Place both members in comparable environments wherever practical. Where the package forces an asymmetry, model or budget it explicitly. Adding a compensating meander far away may correct delay while leaving the original discontinuity and mode conversion unresolved.
Keep the pair together for a reason
Pair spacing affects differential behavior, but maximum coupling is not a universal goal. Choose spacing with the required impedance, manufacturable widths, and neighboring-channel clearance in mind. If the pair separates briefly at a connector or BGA, keep the exception controlled and evaluate its length and geometry. Avoid an abrupt gap change merely to maintain a visual pattern. The electrical objective is predictable propagation and acceptable common-mode behavior across the complete route.
Review the pair as a channel, not two nets
A useful checklist compares both members at every transition and reference change. Record their route layers, via spans, pads, uncoupled sections, and package-delay assumptions. Then check pair-to-pair spacing and the available return path. Use the CAD mismatch report as one input, supplemented by an overlay of critical locations. For demanding links, analyze differential transmission and conversion behavior rather than interpreting a single-ended impedance result as proof of pair quality.
A continuous reference keeps the return path close
Dielectric · geometry + material
Core or build-up dielectric
Illustrative only. Copper thickness, dielectric construction and via spans require a reviewed stackup.
Common questions
Do differential pairs need a ground reference?
They still interact with reference conductors, especially through asymmetry and common-mode behavior. Do not use differential signaling as permission to cross reference-plane gaps.
Should I length-match every pair to every other pair?
Only when the interface requires it. Intra-pair skew and lane-to-lane timing are different requirements and should have separate rules.
References & further reading
Method & assumptions · General design guidance. Validate the proposed construction and acceptance criteria for your project.