Name the structure behind each target
Separate single-ended and differential requirements, then identify the layers and net classes to which each applies. State the reference planes and whether an outer-layer line includes solder mask or nearby copper in its model. Altium's layer-stack documentation connects impedance profiles to reference layers and routing rules. Whatever CAD tool is used, keep this relationship explicit so a layer change does not silently retain dimensions calculated for a different cross-section.
Make tolerance part of the design
Ask the fabricator for a proposed geometry and realistic variation in finished width, copper thickness, and dielectric separation. Evaluate the combinations relevant to your margin instead of calculating only the nominal case. If the target geometry conflicts with a dense escape, define a limited neckdown and model its effect. Do not apply that narrow width to the whole channel merely because it fits between pads. Preserve the location and extent of exceptions in the design review.
Define what a coupon will represent
A useful coupon shares the relevant material construction and production process with the board. Agree which line structures and layers require representation, where measurements begin and end, and how acceptance is reported. A coupon cannot prove that every via and connector launch in the functional route is ideal. Use it to verify the manufactured transmission-line structure, then assess discontinuities through their own models or measurements where the interface budget requires it.
Control the final handoff
Include an impedance table in the release package with target, tolerance, structure, layer, and nominated nets. Make clear how proposed width adjustments will be approved and checked against spacing constraints. Review the final fabrication stackup against the CAD version before manufacture. If the material or pressed thickness changes, rerun the relevant calculations rather than treating the old width as authoritative. The controlled item is the electrical structure produced by the agreed construction.
A continuous reference keeps the return path close
Dielectric · geometry + material
Core or build-up dielectric
Illustrative only. Copper thickness, dielectric construction and via spans require a reviewed stackup.
Common questions
Does every trace on an HDI board need controlled impedance?
No. Identify the interfaces whose edge rate, route length, and requirements justify it, then apply clear net and layer rules.
Does passing an impedance coupon prove channel compliance?
No. It verifies the represented line structure under the agreed test. Loss, timing, crosstalk, vias, packages, and connectors may require additional evaluation.
References & further reading
Method & assumptions · General design guidance. Validate the proposed construction and acceptance criteria for your project.